1. Field of the Invention
The present invention relates to a compression of decoded picture and particularly relates to a method and an apparatus for motion compensation adaptive image processing of the decoded picture data, which is not limited to but can be used in video decoding systems such as ones adopting MPEG video coding standards.
2. Description of the Conventional Art
In order for a real-time VLSI decoder to be cost effective, it is necessary to reduce its resources. There are several ways to reduce the cost but one of them is to use less memory. Other methods could reduce computational complexity, lower its bandwidth usage, and memory more which include implementation issues.
The Advanced Television System Committee (ATSC) adopted the ISO/IEC 18318-2 a.k.a. the MPEG-2 Video Coding Standard which encodes and decodes moving pictures Specially, the Digital Television (DTV) System in the U.S. adopts MPEG-2 MP@HL video coding specification as its standard and specifies 18 different picture formats. Among the many formats, 1920×1082×30 frames/sec requires the most frame memory and bandwidth. To decode this picture size, a decoder requires about 16 Mbytes of memory since external memory is available in specific sizes.
In designing a real-time VLSI decoder, the memory bandwidth is very critical and increases the cost of the chip. Also, due to its large external memory requirement for decoded frame storage it will also increase the cost of its target application, such as PC add-in card or Set-top Box (STB). Therefore, above mentioned factors become critical, making a VLSI implementation inappropriate for consumer electronics.
An HDTV decoder must be able to decode all the 18 formats recommended by the ATSC specification, ATSC DTV video formats, using MPEG Main Profile/Main Level specification, are all in 4:2:0 Y, Cb, Cr mode. The 18 formats are combinations of the followings:
1) 4 different picture sizes, which are, 1920×1080, 1280×720, 704×480 and 640×480
2) 2 different aspect ratio information, which are 4:3 and 16:9
3) 8 different frame rate codes, which are 23.976 Hz, 24 Hz, 29.97 Hz, 30 Hz, 59.94 Hz, and 60 Hz
4) progressive or interlaced sequences
Also, the MPBG-2 video adopted by the ATSC supports 3 different coding modes, which is also called picture coding types. Each of these 3 picture coding types has different characteristics. They are Intra (I), Predictive (P) and Bi-directional (B) picture types. I pictures are coded without reference to other pictures. And they can be used to predict the P and B pictures P pictures are coded using previous I picture or other P pictures as a reference, and the P pictures can predict the future P and B pictures B pictures are coded using I and P pictures from previous and future pictures. But B pictures are not used as a reference
FIG. 1 is a schematic block diagram of an image processing apparatus in accordance with the conventional art.
The image processing apparatus in accordance with the conventional art includes a variable length decoder 101 decoding input image data (input bitstreams) as variable length and outputting decoded image data and motion vector signal, a motion compensation unit 106 receiving the motion vector signal from the variable length decoder 101 and outputting motion compensation information to compensate the received image data, a dequantizer 102 dequantizing the variable length decoded image data and generating dequantized image data, inverse discrete cosine transform (IDCT) unit 103 transforming the dequantized image data into inverse discrete cosine transform data, an image frame processing unit 104 processing the inverse discrete cosine transform data as a frame unit according to the motion compensation information, and a memory 105 storing the image data received from the image frame processing unit 104 and outputting the stored image data to the motion compensation unit 106 and a display (not shown).
The decoding procedure of the MPEG-2 Video is in the following order as shown in FIG. 1 Input bit stream is first Variable Length Decoded at the Variable Length Decoder (VLD) 101. From the Variable Length Decoder 101 motion vector information and variable length decoded (VLD) data are outputted to the dequantizer 102. That is, the VLD data is inverse-scanned and dequantized then fed to the IDCT block. Motion vector signals are used to retrieve block data from the reference picture by the Motion Compensator. Finally, the image frame processing unit 104 processes the IDCT data based on the motion compensation information from the Motion Compensator 106 and outputs motion compensated data to reconstruct the input image data. Then, 16 MB of exter pictures, 2 pictures being reference and the other being the B pictures. The Display Controller (not shown) reads pictures from the external memory 105 and displays them on the TV or monitors (not shown).
The Display Controller and Motion Compensator 106 are implemented as the blocks that use most of the bandwidth. Especially for Motion Compensator 106, unlike Display Controller, the memory data needs to be accessed randomly for motion compensation purpose since, motion compensation is done on block i.e., 16×16 or 16×18 pel basis.
Usually, MPEG encodes sequences using combination of I, P and B pictures causing the prediction error to propagate until the error is refreshed by the next I picture. Therefore, the compression scheme must be balanced between random accessibility of the decoded data and moderate compression ratio to meet the compression needs, and also be able to propagate less error.